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Red Pitaya

The Red Pitaya is a data aquisition platform with an integrated ADC and FPGA. This page documents the firmware and software system used to operate the Red Pitaya for the data aquisition application.

Building and Setup

The DAQ project requires an implementation of the standard c libraries and math libraries. The easiest way to satisfy dependencies is to install a linux system. Pavel Demin has made a repository containing scripts to install a linux system and required applications for booting. If you use Pavel's build scripts, you must allocate 256MB of memory for the FPGA DMA. There are two ways to do this, either

  • Modify red-pitaya-notes/patches/devicetree.patch and add 
@@ -24,6 +36,6 @@
    };
    memory {
        device_type = "memory";
 -      reg = <0x0 0x20000000>;
 +      reg = <0x0 0x10000000>;
    };
  };
  • or add to your kernel boot arguments cma=256M in red-pitaya-notes/uEnv.txt.

You can then generate your preferred linux distribution. The scripts should generate a system with Xilinx's FPGA runtime reprogramming driver enabled. The FPGA is mapped to /dev/xdevcfg. You can write bitmaps to this in order to load a hardware definition, for instance

cat zynq7010.bit > /dev/xdevcfg

Address/Memory Layout

Devices are mapped to memory using a device tree. Some FPGA components are also mapped to DRAM over DMA. Some important addresses are

  • 0x0000_0000 - 0x0FFF_FFFF: DRAM System Memory, managed by Linux
    • +0x0200_0000: Device tree load address devicetree.dtb
    • +0x0208_0000: Kernel load address uImage
    • +0x0300_0000: Linux Ramdisk load address uInitrd
  • 0x1000_0000 - 0x11FF_FFFF: DRAM FPGA Direct Memory Access Ring buffer
  • 0x4000_0000 - 0x4000_0032: FPGA Configuration registers
    • +0x0 uint8: Reset registers
      • << 0: Unused
      • << 1: Data aquisition chain reset
      • << 2: DMA Writer reset
      • << 3 - << 7: Unused
    • +0x8 uint16: Trapezoid K-delay
    • +0xA uint16: Trapezoid L-delay
    • +0xC uint16: Trapezoid M shaping constant
    • +0x10 uint16: Trigger Threshhold for event capturing

See the device tree files for device mappings.

Ring Buffer

The primary ring buffer contains sequential samples in the format

  • uint32: Time
  • uint16: ADC Channel 1
  • uint16: ADC Channel 2

(Remember to disable struct padding if using C/C++)

DAQ Project File Structure

The organization of the github repository for the DAQ project

  • /cores: Various IP modules for signal processing.
  • /pavel-cores: IP modules imported from pavel's red-pitaya-notes project
  • /project: Vivado project files
  • /software: Drivers and programs for interfacing with the FP